The process of generating a (minimal) set of input patterns to stimulate inputs of a system such that detectable faults can be exercised.

Test generation process consists of two phases - derivation and application.

Derivation of test:

- Select appropriate model for the system
- Select appropriate models for faults (link)
- Construct the test that the output from a faulty system is different from that of a good one

Application of test must be efficient in time and in space.

**Sensitization** - the process of driving the system to a state where a fault causes an actual erroneous value in the system at the point of the fault

**Propagation** - the process of driving the system to a state where the error becomes observable at the primary outputs.

**Exhaustive** - apply every possible input vector (16,384 test vectors for ALU with 14 inputs)
**Functional** - test every function of the system (448 test vectors for ALU with 14 inputs)
**Fault Model Derived** - find a test for every modeled fault (47 test vectors for the ALU)

The main considerations:

- The time to construct a minimal test set
- The size of software or hardware test generator
- The size of test set itself
- The time to load test patterns
- The equipment required (if external) or BIST overhead

- Exhaustive - apply all possible input patterns
- Pseudoexhaustive - segment the system and test each module exhaustive
- Algorithmic
- Pseudo-random - generate patterns that appear to be random but are in fact deterministic (repeatable)
- Linear Feedback Shift Register (LFSR)
- Weighted pseudo-random test generation
- Adaptive pseudo-random test generation

- List primary inputs controlling location where a fault should be detected
- Determine primary input conditions to activate a fault and to sensitize the path to primary outputs such that the fault can be observed
- Repeat procedure for each detectable fault

- Large set of patterns is generated by simple HW or SW pseudo-random generator
- The set is used to stimulate a system with fault simulator
- Fault coverage is analyzed and algorithmic approach is used to cover remain faults

Pseudo-Random Test Generator generates complex pseudorandom (or random) sequences of test patterns. Its output is a set of variables which controls Input Simulator. Each variable represents different parameter of Input Simulator (like delay between messages, opcode, message fields, etc.). Each variable may be assigned by generator as just a value out of specified range as well as through look-up table. Look-up tables provide a way to choose only a subset of possible values, to change frequency of different values in output sequence and to use ASCII values.

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